In the production of very large scale integrated (VLSI) circuits, it is desirable to be able to selectively etch the various layers used in the production of the devices. The term "selectively etch" means simply that the etch process occurs only or primarily upon one of the materials exposed on the working surface of the wafer or that would be exposed once overlying layers were etched through. As a practical matter, it is nearly impossible to develop a series of etch processes which is 100% selective only to a particular material, that is, which will not etch any other material except the one intended. Thus, the goal becomes devising etch processes which will etch the material of interest appreciably faster than the adjacent materials necessarily exposed to the same etch process.
It is typical in the manufacture of VLSI circuits, particularly those made by metal oxide semiconductor (MOS) methods, to form a thin layer of dielectric over the monocrystalline silicon substrate early in the process. Frequently this dielectric material is silicon dioxide or SiO.sub.2, which may be deposited or thermally grown. Next it is customary to form the transistor gate electrode material in a layer over the dielectric material layer. Polycrystalline silicon, also called polysilicon, is typically used for this layer. In the etching and forming of the semiconductor devices, the dielectric material layer and the gate material layer are independently formed, usually by etching, into the desired geometries. The preferred way to conduct this selective forming is to use photolithography processes which involve applying a layer of photoresist to the top of the gate material layer, exposing it and washing away the exposed photoresist (in the case of positive photoresist). Then, the portions of the gate material layer which are exposed or open to the ambient on the top surface of the layer are etched. The portions of the gate material layer covered by photoresist are protected and remain. Ideally, only the etching of the gate material layer occurs and the etch process stops or slows greatly when the plasma, if a plasma etch is used, reaches the underlying dielectric layer.
When plasma etch processes are used to etch polysilicon over a silicon dioxide layer alone, the relative etch rates are very good, that is, the etch rate of polysilicon to silicon dioxide is 100 to 1 or better, also expressed as 100:1. However, if photoresist material is present, as it must be if the device geometries are to be formed, the etch rate ratio falls off to 30:1 or less due to an increase in the etch rate of silicon dioxide. Thus, it would be desirable to discover a process for selectively etching polysilicon in preference to SiO.sub.2 in the presence of photoresist.